[1]
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Kevin Angstadt and Ed Harcourt. 2015.
A Virtual Machine Model for Accelerating Relational Database Joins using a General Purpose GPU.
In Proceedings of the High Performance Computing Symposium (HPC'15). Society for
Computer Simulation International and ACM SIGSIM.
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[2]
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Ed Harcourt and Jamie Perconti.
A SystemC library for specifying pipeline abstractions.
Microprocessors and Microsystems, 38(1):76-81, February 2014.
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[3]
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Richard Sharp and Ed Harcourt.
Design and construction of general purpose computing resources for Linux
based computer science education.
Journal of Computing Science in Colleges,
26(1):150-156, October 2010.
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pdf ]
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[4]
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Ed Harcourt.
Policies of system level pipeline modeling.
Electronic Notes in Theoretical Computer Science, 238(2):13-23.
Elsevier, 2009.
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pdf ]
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[5]
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Ed Harcourt.
Simulation, Design Abstraction, and SystemC.
Computer Science Education, 17(2):87-96, June 2007.
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pdf
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[6]
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Ed Harcourt.
Teaching computer organization and architecture using SystemC.
The Journal of Computing Science in Colleges, 21(2):27-39, December
2005.
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pdf ]
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[7]
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Brian Ladd and Ed Harcourt.
Student competitions and bots in an introductory computer programming
course.
The Journal of Computing Science in Colleges, 20(5):274-284, May 2005.
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pdf ]
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[8]
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Paolo Giusto, Grant Martin, and Ed Harcourt.
Reliable estimation of the execution time of embedded software.
In Proceedings of the Design Automation and Test Europe (DATE),
pages 580-588. IEEE Press, March 2001.
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pdf ]
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[9]
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Jwahar Bammi, Ed Harcourt, Wido Kruitzer, Luciano Lavagno, and Mihai Lazarescu.
Software performance estimation strategies in a system level design
tool.
In Proceedings of the Eighth International Workshop on
Hardware/Software Codesign (CODES). IEEE Press, March 2000.
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pdf ]
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[10]
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Gérard Berry, Ed Harcourt, Luciano Lavagno, and Ellen Sentovich.
ECL: A Specification Environment for System-Level Design, pages
205-212.
CHDL. Kluwer Academic Publishers, 2001.
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[11]
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M. T. Lazarescu, J. R. Bammi, E. Harcourt, L. Lavagno, and M. Lajolo.
Compilation-based software performance estimation for system level
design.
In HLDVT '00: Proceedings of the IEEE International High-Level
Validation and Test Workshop (HLDVT'00). IEEE Computer Society, 2000.
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[12]
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Mark R. Hartoog, James A. Rowson, Prakash D. Reddy, Soumya Desai, Douglas D.
Dunlop, Edwin A. Harcourt, and Neeti Khullar.
Generation of software tools from processor descriptions for
hardware/software codesign.
In DAC '97: Proceedings of the 34th annual conference on Design
automation, pages 303-306, New York, NY, USA, 1997. ACM.
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pdf ]
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[13]
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Ed Harcourt, Jon Mauney, and Todd Cook.
From processor timing specifications to static instruction
scheduling.
In Proceedings of the International Symposium on Static
Analysis, number 864 in Lecture Notes in Computer Science. Springer, 1994.
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pdf ]
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[14]
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Edwin A. Harcourt, Jon Mauney, and Todd Cook.
Formal specification and simulation of instruction-level parallelism.
In EURO-DAC '94: Proceedings of the conference on European
design automation, pages 296-301. IEEE Computer Society Press, 1994.
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pdf ]
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[15]
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Todd Cook and Ed Harcourt.
A functional specification language fior instruction set
architectures.
In Proceedings of the 1994 International Conference on Computer
Languages, pages 11-19. IEEE Computer Society, May 1994.
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[16]
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E. Harcourt, J. Mauney, and T. Cook.
Functional specification and simulation of instruction set
architectures.
In Proceedings of the International Conference on Simulation and
Hardware Description Languages. SCS Press, 1994.
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pdf ]
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[17]
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Todd A. Cook, Paul D. Franzon, Edwin A. Harcourt, and Thomas K. Miller III.
System-level specification of instruction sets.
In International Conference on Computer Design, pages 552-557,
1993.
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pdf ]
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[18]
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Todd A. Cook, Paul D. Franzon, Edwin A. Harcourt, and Thomas K. Miller III.
Behavioral modeling of processors from instruction set
specifications.
In Proceedings of the 2nd International Verilog HDL Conference,
1993.
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[19]
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Todd A. Cook, Paul D. Franzon, Edwin A. Harcourt, and Thomas K. Miller III.
LISAS: a language for instruction set architecture specification.
In Proceedings of the First International Conference on
Hardware/Software Co-design, 1992.
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[20]
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J. Mauney, D.P. Agrawal, Y.K. Choe, E.A. Harcourt, S. Kim, and W.J. Staats.
Computational models and resource allocation for parallel computers.
Proceedings of the IEEE, 77(12), 1989.
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