|Ph.D.||Computer Science, August 1994. North Carolina State University. Raleigh, NC. Dissertation title: Formal Specification of Instruction Set Processors and the Derivation of Instruction Schedulers. Adviser: Dr. Jon Mauney|
|M.S.||Computer Engineering, May 1989. North Carolina State University. Raleigh, NC. Thesis title: Concurrent Compilation via the Parallel Evaluation of Attribute Grammars.|
|B.S.||Computer Science, May 1986. State University of New York. Plattsburgh, NY.|
Department of Mathematics, Computer Science and Statistics. Courses taught include Introduction to Programming, Techniques of Computer Science, Data Structures, Computer Organization and Architecture, Software Engineering, Programming Languages, Algorithms, Web Programming, Database Systems, Mobile Computing.
During this period I served as a system architect, software engineer, project lead, and manager. Products worked on include Verilog, VLHD, SystemVerilog, and SystemC.
Department of Computer Science. Conducted research in formal specification and verification of concurrent real-time systems.
Taught various undergraduate courses in the Department of Computer Science including; Introduction to Programming in Pascal, Introduction to Programming in FORTRAN, Computer Architecture and Assembly Language, Discrete Mathematics, Programming in C and C++, Data Structures, Programming in Scheme, Digital Electronics lab.
|||Kevin Angstadt and Ed Harcourt. 2015. A Virtual Machine Model for Accelerating Relational Database Joins using a General Purpose GPU. In Proceedings of the High Performance Computing Symposium (HPC'15). Society for Computer Simulation International and ACM SIGSIM. [pdf]|
|||Ed Harcourt and Jamie Perconti. A SystemC library for specifying pipeline abstractions. Microprocessors and Microsystems, 38(1):76-81, February 2014. [ link ]|
|||Richard Sharp and Ed Harcourt. Design and construction of general purpose computing resources for Linux based computer science education. Journal of Computing Science in Colleges, 26(1):150-156, October 2010. [ pdf ]|
|||Ed Harcourt. Policies of system level pipeline modeling. Electronic Notes in Theoretical Computer Science, 238(2):13-23. Elsevier, 2009. [ pdf ]|
|||Ed Harcourt. Simulation, Design Abstraction, and SystemC. Computer Science Education, 17(2):87-96, June 2007. [ pdf ]|
|||Ed Harcourt. Teaching computer organization and architecture using SystemC. The Journal of Computing Science in Colleges, 21(2):27-39, December 2005. [ pdf ]|
|||Brian Ladd and Ed Harcourt. Student competitions and bots in an introductory computer programming course. The Journal of Computing Science in Colleges, 20(5):274-284, May 2005. [ pdf ]|
|||Paolo Giusto, Grant Martin, and Ed Harcourt. Reliable estimation of the execution time of embedded software. In Proceedings of the Design Automation and Test Europe (DATE), pages 580-588. IEEE Press, March 2001. [ pdf ]|
|||Jwahar Bammi, Ed Harcourt, Wido Kruitzer, Luciano Lavagno, and Mihai Lazarescu. Software performance estimation strategies in a system level design tool. In Proceedings of the Eighth International Workshop on Hardware/Software Codesign (CODES). IEEE Press, March 2000. [ pdf ]|
|||Gérard Berry, Ed Harcourt, Luciano Lavagno, and Ellen Sentovich. ECL: A Specification Environment for System-Level Design, pages 205-212. CHDL. Kluwer Academic Publishers, 2001. [ http ] [ pdf ]|
|||M. T. Lazarescu, J. R. Bammi, E. Harcourt, L. Lavagno, and M. Lajolo. Compilation-based software performance estimation for system level design. In HLDVT '00: Proceedings of the IEEE International High-Level Validation and Test Workshop (HLDVT'00). IEEE Computer Society, 2000.|
|||Mark R. Hartoog, James A. Rowson, Prakash D. Reddy, Soumya Desai, Douglas D. Dunlop, Edwin A. Harcourt, and Neeti Khullar. Generation of software tools from processor descriptions for hardware/software codesign. In DAC '97: Proceedings of the 34th annual conference on Design automation, pages 303-306, New York, NY, USA, 1997. ACM. [ pdf ]|
|||Ed Harcourt, Jon Mauney, and Todd Cook. From processor timing specifications to static instruction scheduling. In Proceedings of the International Symposium on Static Analysis, number 864 in Lecture Notes in Computer Science. Springer, 1994. [ pdf ]|
|||Edwin A. Harcourt, Jon Mauney, and Todd Cook. Formal specification and simulation of instruction-level parallelism. In EURO-DAC '94: Proceedings of the conference on European design automation, pages 296-301. IEEE Computer Society Press, 1994. [ pdf ]|
|||Todd Cook and Ed Harcourt. A functional specification language fior instruction set architectures. In Proceedings of the 1994 International Conference on Computer Languages, pages 11-19. IEEE Computer Society, May 1994.|
|||E. Harcourt, J. Mauney, and T. Cook. Functional specification and simulation of instruction set architectures. In Proceedings of the International Conference on Simulation and Hardware Description Languages. SCS Press, 1994. [ pdf ]|
|||Todd A. Cook, Paul D. Franzon, Edwin A. Harcourt, and Thomas K. Miller III. System-level specification of instruction sets. In International Conference on Computer Design, pages 552-557, 1993. [ pdf ]|
|||Todd A. Cook, Paul D. Franzon, Edwin A. Harcourt, and Thomas K. Miller III. Behavioral modeling of processors from instruction set specifications. In Proceedings of the 2nd International Verilog HDL Conference, 1993.|
|||Todd A. Cook, Paul D. Franzon, Edwin A. Harcourt, and Thomas K. Miller III. LISAS: a language for instruction set architecture specification. In Proceedings of the First International Conference on Hardware/Software Co-design, 1992.|
|||J. Mauney, D.P. Agrawal, Y.K. Choe, E.A. Harcourt, S. Kim, and W.J. Staats. Computational models and resource allocation for parallel computers. Proceedings of the IEEE, 77(12), 1989. [ pdf ]|